[PDF.92po] Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing)

Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing)

[PDF.hg97] Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing)

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 | #5187269 in Books |  Springer |  1998-10-31 | Ingredients: Example Ingredients | Original language:English | PDF # 1 |  9.21 x.50 x6.14l,1.05 | File type: PDF | 191 pages

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||0 of 0 people found the following review helpful.| Awsome book on testing!|By A Customer|This book is the ultimate reference on testing for VLSI circuits. It is a must have if your interest is in delay testing. It is truly superbly written.

In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, ...

You can specify the type of files you want, for your gadget.Delay Fault Testing for VLSI Circuits (Frontiers in Electronic Testing)   |  Angela Krstic, Kwang-Ting (Tim) Cheng. Just read it with an open mind because none of us really know.

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